1. Field of the Invention
The present invention relates to a method for forming a semiconductor thin film applied to, for example, structural elements of a three dimensional integrated circuit or a large area electronic element.
2. Related Background Art
In the past, the method for growing a solid phase by exposing an amorphous thin film previously formed on a substrate to a thermal treatment at a low temperature below the melting point has been proposed as a method for forming a crystalline thin film on an amorphous substrate.
For example, there has been a technique reported in which a polycrystalline Si thin film having a grain size of 5 .mu.m can be formed according to the procedure comprising effecting a solid phase growth by exposing an amorphous Si thin film having a film thickness of about 100 nm formed on amorphous SiO.sub.2 and modified to an amorphous state by ion implantation, to thermal treatment at 600.degree. C. for several ten hours under N.sub.2 atmosphere, whereby the amorphous Si thin film is crystallized. (T. Noguti, H. Hayashi and H. Ohshima, 1987, Mte. Res. Soc. Symp. Proc. 106, Polysilicon and Interfaces, 293, Elsevier Science Publishing, New York 1899).
The grain size of the polycrystalline thin film obtained by this method is about 100 times larger than that of the polycrystal film deposited by a reduced pressure CVD method. Therefore, it is possible to make a high performance electronic element on the thin film. For example, the electron mobility of a field effect transistor (MOSFET) formed on the thin film obtained by the above method is several times to several ten times higher than that of MOSFET formed on the polycrystal thin film deposited by the reduced pressure CVD method as such. More concretely, when a P channel or N channel MOSFET is produced, the carrier mobility of the latter is about 50 cm.sup.2 /V.sec and that of the former is 100 cm.sup.2 /V.sec.
However, the inventer found that this technique had the problems described below. That is, it was surmised that a large amount of crystal defects were present inside each crystal grain since the crystal growing pattern in this technique was the dendritic growth effected by introducing a twin crystal grain boundary and indeed, as the result of actual observation of the crystallographic structure by using a transmission electron microscope, the inventer found that the large amount of defect groups existed and the carrier mobility was restricted.
On the other hand, high temperature local thermal treatment employing an energy beam (coherent light (laser light), electron beam, ion beam, etc.) has been reported as a technique for growing a crystal on an amorphous insulator substrate. In this method, crystallization is achieved by focusing an energy beam and heating a local area to nearly the melting point. Due to the local heating, the process essentially can be a low temperature process without raising the temperature of the whole substrate. However, the local heating causes many problems with relation to productivity and controllability both. The reason is as follows: For thermally treating the whole surface of a substrate with a large area, it is absolutely necessary to scan a beam. In addition, a long time is required for uniformly treating the large area since it is necessary to finely adjust the degree of overlap of a beam, the depth of a focus, etc. during the beam scanning.